TECHNOLOGY AREA(S): Info Systems, Sensors, Electronics
OBJECTIVE: Develop an Energy Efficient, Non-Silicon (non-Si) Digital Signal Processor (DSP) that can be integrated on the same die as an already demonstrated superconductive or photonic ultra-wide analog to digital converter (ADC) and used to adaptively thin the data stream produced as to signal band of interest, direction of signal arrival, or transmit the data to the user only if the signals characteristics match a fully specified set of signal parameters. Such processing must be accomplished in real time with less latency and power consumption than if done using commercial off the shelf (COTS) Si digital processors such as field-programmable gate array (FPGA).
DESCRIPTION: Both superconductive and photonic based technologies have recently demonstrated ultra-wideband analog to digital conversion (ADC) capability. However, neither technology have yet demonstrated preliminary signal processing technology integrated with the ADC onto a single LSI or PIC die and instead depend on FPGA, Graphics Processing Unit (GPU), or central processing unit (CPU) post-processing. The gates required, power and time required to complete this step encourage legacy system users interested in single RF functions to refuse to consider adopting such potentially universal, lower non-recurring engineering (NRE) and logistics cost ADC hardware “ it provides more data than they need and all that excess is effectively just noise, even though it may be the signal of interest to other users on the same platform. Acquisition programs tend to focus on redoing legacy functionalities one at a time, rather than looking for mergers. If the technologies could be matured to produce upon software request exactly the data the user requests at that moment and dispose of the rest without user attention, the narrow band users would not need to modify their established approach to the data they receive. But the data processing, being digital and based on a single representation of the entire wide-band signal environment, can be expanded to service in parallel a range of such narrow band users simultaneously and without any one applications requirements having impacted the quality of data provided to additional data consumers.
Recognized, early stage Digital Signal Processing (DSP) components of many sorts are acceptable to propose so long as they reduce the net data rate delivered to the user who defines the selection criteria to be used and are useful across the entire RF spectrum, DC to 110 GHz. For example, superconducting ADCs have demonstrated programmable cascade integrator comb (CIC) based channelizers between their digitizers and their outputs, but these don't adequately suppress out-of-the-intended-band signals in dense signal environments. Finite Impulse Response (FIR) or Infinite impulse response (IIR) filters could suppress out-of-the-intended-band signals in dense signal environments. True time delay, element level beam formers have been notionally architected, but not proven. Sensors that turn on data output only when a signal is likely present are useful in sparse signal environments and reduce the volume of data that must be post-processed. Photonics has developed mixer and frequency comb based methods of selecting center frequencies, but has not demonstrated neither variable band width nor integration with selection. Work on blind source separation has only recently begun. Both these classes of technologies are ready for an advancement. The initial proposal must define which sort of DSP functionality will be worked, with what kind of algorithm, and explain why that class of algorithm is well suited to the technology. It also should address both the latency and energy efficiency of the proposed approach(s) in comparison to what is achieved today using COTS Si processors.
PHASE I: Determine concept technical feasibility by developing through scientific argumentation and sub-circuit demonstrations the non-Si DSP approach concept defined in the Description section. By the end of the Phase I, the proposed design, if eventually realized, must have low technical risk to achieve the asserted DSP functionality and plausibly be compactly packaged with the ADC to achieve lower latency and higher energy efficiency than todays COTS Si processors programmed to achieve the same functionality. Proposers must structure their Phase I proposal so that any university non-profit partner is contributing only to fundamental research sub-efforts. In the first option, if awarded, begin to work the issue of highest technical risk during the Phase II.
PHASE II: Using results from Phase I, fabricate and validate the DSP functionality of concept in a brass-board prototype and achieve a minimized SWaP, integrated prototype. Several rounds of design-fabrication-test-and analysis are expected during development. Analog input signals used for testing should include standard wideband communications modulations as well as conventional multi-continuous wave tones and big-little testing to stress the front end. If element level beam forming is the proposed focus, at least 4 elements at least 4 GHz wide and 2 beams should be demonstrated. A full Rx chain, at least in hardware in the loop testing mode, is desirable to use.
PHASE III: During Phase III, the preprocessing approach will be further refined and incorporated into wideband, cognitive receiver products produced. In the military, these are used in electronic warfare (EW) and other programs emphasizing full spectrum situational awareness. Multi-functional systems requiring universal receivers are also transition possibilities. Within the telecom industry, the current movement toward more RF communications like waveforms (versus pure binary) and photonic data transport both represent potential transition paths. Private Sector Commercial Potential: Telecommunications is likely the primary commercial outlet. Photonic digital signal distribution is rapidly becoming the norm in high performance computing environments, and long haul trunk lines are already done primarily photonically. But the proven methods of frequency selection are entirely analog in imagination. Conversely, superconducting electronics today works almost exclusively in the mixed signal and purely digital arenas. There are system functionalities such as processing packet headers in routers without first demodulating or decrypting them and analog signal processing that could have significant commercial markets were they existent. Hence demonstrations of DSP functionalities that can be combined with wideband receivers may stimulate new commercial applications.
REFERENCES: 1. D. Gupta, T. V. Filippov, et al., Digital channelizing radio frequency receiver, IEEE Trans. Appl. Supercond., vol. 17, no. 2, pp. 430“437, June 2007.2. H. Hayakawa, N. Yoshikawa, S. Yorozu, and A. Fujimaki, Superconducting digital electronics, Proceedings of the IEEE, vol. 92, no. 10, pp. 1549“1563, October 2004.3. Holmes, D. Scott, Alan M. Kadin, and Mark W. Johnson. "Superconducting Computing in Large-Scale Hybrid Systems." Computer 48.12 (2015): 34-42.4. Sudharman K. Jayaweera, "Signal Processing for Cognitive Radios", John Wiley Press, 2014, ISBN: 978-1-118-82493-1.-
KEYWORDS: Digital Signal Processing; Signal Recognition; Search Algorithms; Photonic Processing; Superconductive Electronics; Routers; Machine Learning
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