Mapping Complex Sensor Signal Processing Algorithms onto Neuromorphic Chips

OUSD (R&E) CRITICAL TECHNOLOGY AREA(S): Trusted AI and Autonomy; Advanced Computing and Software; Microelectronics; Emerging Threat Reduction The technology within this topic is restricted under the International Traffic in Arms Regulation (ITAR), 22 CFR Parts 120-130, which controls the export and import of defense-related material and services, including export of sensitive technical data, or the Export Administration Regulation (EAR), 15 CFR Parts 730-774, which controls dual use items. Offerors must disclose any proposed use of foreign nationals (FNs), their country(ies) of origin, the type of visa or work permit possessed, and the statement of work (SOW) tasks intended for accomplishment by the FN(s) in accordance with the Announcement. Offerors are advised foreign nationals proposed to perform on this topic may be restricted due to the technical data under US Export Control Laws. OBJECTIVE: Develop an efficient workflow and approach for mapping complex RF and radar signal processing algorithms onto neuromorphic hardware. The neuromorphic hardware can be a limited research prototype or a commercial product. The signal processing algorithms encompass processing of RF signals to decode communication waveforms, Multiple-Input Multiple-Output (MIMO) adaptive beamforming, Space-Time Adaptive Processing (STAP), Ground Moving Target Indicator radar, and generating Synthetic Aperture Radar (SAR) images from raw in-phase and quadrature data. The goal is to outline a versatile approach that can translate algorithms as specified in the Matlab or Python software environment into a neuromorphic model implemented in physical hardware. DESCRIPTION: The ubiquity of embedded RF devices and the Internet of Things (IoT) has motivated approaches to process data with less latency and power consumption [1]. Neuromorphic integrated circuit (IC) hardware has enabled new ultra-low power embedded RF and radar signal processing applications implemented through deep learning neural network (DLNN) models [2-4]. Neuromorphic hardware provides an advantage of a factor of 100 in power consumption per inference relative to emulation using a traditional Graphics Processing Unit (GPU) [5]. PHASE I: As this is a Direct-to-Phase-II (D2P2) topic, no Phase I awards will be made as a result of this topic. To qualify for this D2P2 topic, the Government expects the applicant(s) to demonstrate feasibility by means of a prior Phase I-type effort that does not constitute work undertaken as part of a prior or ongoing SBIR/STTR funding agreement. The required feasibility demonstration must include successfully developing advanced AI-based radio frequency (RF) algorithms and successfully porting them to a neuromorphic chip, with the final chip performing very well. PHASE II: Using a HWIL approach, awardee(s) will measure the response of the neuromorphic hardware to RF and radar signals in real time. Awardee(s) will validate the performance of the neuromorphic hardware in terms of power consumption and timing latency. Awardee(s) will confirm that the outputs are deterministic and compare favorably to the expected values from the M&S environment. PHASE III DUAL USE APPLICATIONS: The awardee(s) will identify potential commercial and dual use neuromorphic applications for the IoT such as MIMO adaptive beamforming. REFERENCES: C. Xiao, J. Chen, and L. Wang, "Optimal Mapping of Spiking Neural Network to Neuromorphic Hardware for Edge-AI," Sensors, vol. 22, no. 19, p. 7248, 2022. A. Baietto, J. Boubin, P. Farr, T. J. Bihl, A. M. Jones, and C. Stewart, "Lean neural networks for autonomous radar waveform design," Sensors, vol. 22, no. 4, p. 1317, 2022. P. Farr, A. M. Jones, T. Bihl, J. Boubin, and A. DeMange, "Waveform design implemented on neuromorphic hardware," in 2020 IEEE International Radar Conference (RADAR), 2020, pp. 934-939: IEEE. M. Barnell, C. Raymond, M. Wilson, D. Isereau, and C. Cicotta, "Target classification in synthetic aperture radar and optical imagery using loihi neuromorphic hardware," in 2020 IEEE High Performance Extreme Computing Conference (HPEC), 2020, pp. 1-6: IEEE. C. D. Schuman, S. R. Kulkarni, M. Parsa, J. P. Mitchell, P. Date, and B. Kay, "Opportunities for neuromorphic computing algorithms and applications," Nature Computational Science, vol. 2, no. 1, pp. 10-19, 2022. (2023). RFView Family of Digital Engineering Tools. Available: https://www.islinc.com/products/rfview; KEYWORDS: AI; Neuromorphic computing; Low C-SWAP; Embedded processing